1. Field of the Invention
The present invention relates to a differential amplifier circuit and a semiconductor memory device using the differential amplifier circuit. More specifically, the present invention relates to a configuration for increasing the amplification factor.
2. Description of the Background Art
When such a semiconductor memory device as static RAM (Random Access Memory) reads data in a memory cell, current flows through a pair of bit lines connected to that memory cell. Regarding the current flowing through the paired bit lines, one of respective currents flowing through the paired bit lines becomes larger than the other one, depending on whether the data in the memory cell has H (logical high) level and L (logical low) level. The difference in current between the paired bit lines is considerably small and thus a differential amplifier circuit is employed as a sense amplifier for amplifying such a slight difference in current between the bit lines.
One example of such a differential amplifier circuit used for the semiconductor memory device is disclosed for example in Japanese Patent Laying-Open No. 7-230694.
FIG. 13 shows a basic configuration of the differential amplifier circuit. As shown, the differential amplifier circuit includes a pair of P-channel MOS transistors (hereinafter P-type transistors) P100 and P101 and a pair of N-channel MOS transistors (hereinafter N-type transistors) N100 and N101.
P-type transistors P100 and P101 each have the gate connected to the drain of the other P-type transistor (cross-coupled). N-type transistors N100 and N101 are diode-connected.
An input terminal D is connected to the source of P-type transistor P100, and an input terminal DC is connected to the source of P-type transistor P101. An output terminal Q is connected commonly to respective drains of N-type transistor N100 and P-type transistor P100, and an output terminal QC is connected commonly to respective drains of N-type transistor N101 and P-type transistor P101.
Input terminal D and input terminal DC respectively receive current I1 and current I2. Here, it is supposed that current I1 is larger than current I2. Current I1 flows through P-type transistor P100 and N-type transistor N100 while current I2 flows through P-type transistor P101 and N-type transistor N101.
Positive feedback is performed by cross-coupled P-type transistors P100 and P101. When current I1=I flows from input terminal D and current I2=I−dI flows from input terminal DC, voltage V is generated at output terminal Q while voltage V−dV is generated at output terminal QC according to respective values of these currents. When the voltage dV is large enough, output terminal Q is identified as H level and output terminal QC is identified as L level. From respective voltage levels on the paired output terminals, whether the data in the memory cell has H level or L level is determined.
As discussed above, the conventional differential amplifier circuit is capable of amplifying a difference between supplied current values as a difference between respective voltage levels on paired output terminals. Such a differential amplifier circuit may be employed as a sense amplifier circuit of a semiconductor memory device to amplify a difference of currents flowing respectively through paired bit lines into a difference of respective voltage levels on paired output terminals so as to determine, by the amplified voltage level, whether the data in the memory cell has L level or H level.
The above-described conventional differential amplifier circuit, however, has an unsatisfactory amplification factor, i.e., the ratio of the difference dI in input current to the difference dV in output voltage.
One reason for this is from characteristics of the diode-connected N-type transistors.
FIG. 14 shows current-voltage characteristics of the diode-connected N-type transistors. Because of the steep slope of the characteristic curve as shown in FIG. 14, small difference dI in drain current results in small difference dV in drain-source voltage. Then, a small difference dI in input current results in a small difference dV in output voltage.
Suppose that the differential amplifier circuit is employed as a sense amplifier of an SRAM (Static Random Access Memory). Here, the difference in input current ranges from 0 to 100 μA, while the difference in output voltage dV for this difference in input current is approximately 30% of Vdd and is extremely small. Therefore, it is impossible to accurately determine which of the paired output terminals has L level or H level. Then, in order to determine the voltage level of the pair of output terminals, repeated positive-feedback operation by P-type transistors P100 and P101 is required, for making voltage difference dV sufficiently large, resulting in decrease in reading rate of the data from the memory cell.